unicorn.arm source code

1 /* Unicorn Engine */
2 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2015 */
3 
4 module unicorn.arm;
5 
6 import unicorn.unicorn;
7 
8 extern(C):
9 
10 /// ARM registers
11 enum uc_arm_reg {
12 	INVALID = 0,
13 	APSR,
14 	APSR_NZCV,
15 	CPSR,
16 	FPEXC,
17 	FPINST,
18 	FPSCR,
19 	FPSCR_NZCV,
20 	FPSID,
21 	ITSTATE,
22 	LR,
23 	PC,
24 	SP,
25 	SPSR,
26 	D0,
27 	D1,
28 	D2,
29 	D3,
30 	D4,
31 	D5,
32 	D6,
33 	D7,
34 	D8,
35 	D9,
36 	D10,
37 	D11,
38 	D12,
39 	D13,
40 	D14,
41 	D15,
42 	D16,
43 	D17,
44 	D18,
45 	D19,
46 	D20,
47 	D21,
48 	D22,
49 	D23,
50 	D24,
51 	D25,
52 	D26,
53 	D27,
54 	D28,
55 	D29,
56 	D30,
57 	D31,
58 	FPINST2,
59 	MVFR0,
60 	MVFR1,
61 	MVFR2,
62 	Q0,
63 	Q1,
64 	Q2,
65 	Q3,
66 	Q4,
67 	Q5,
68 	Q6,
69 	Q7,
70 	Q8,
71 	Q9,
72 	Q10,
73 	Q11,
74 	Q12,
75 	Q13,
76 	Q14,
77 	Q15,
78 	R0,
79 	R1,
80 	R2,
81 	R3,
82 	R4,
83 	R5,
84 	R6,
85 	R7,
86 	R8,
87 	R9,
88 	R10,
89 	R11,
90 	R12,
91 	S0,
92 	S1,
93 	S2,
94 	S3,
95 	S4,
96 	S5,
97 	S6,
98 	S7,
99 	S8,
100 	S9,
101 	S10,
102 	S11,
103 	S12,
104 	S13,
105 	S14,
106 	S15,
107 	S16,
108 	S17,
109 	S18,
110 	S19,
111 	S20,
112 	S21,
113 	S22,
114 	S23,
115 	S24,
116 	S25,
117 	S26,
118 	S27,
119 	S28,
120 	S29,
121 	S30,
122 	S31,
123 
124 	C1_C0_2,
125 	C13_C0_2,
126 	C13_C0_3,
127 
128 	ENDING,		// <-- mark the end of the list or registers
129 
130 	//> alias registers
131 	R13 = SP,
132 	R14 = LR,
133 	R15 = PC,
134 
135 	SB = R9,
136 	SL = R10,
137 	FP = R11,
138 	IP = R12,
139 }